Sr Staff FPGA/Logic Designer

San Diego, California

Actions

Share This Job

Bookmark and Share

Job Description

Design the interface and hosting logic for emulation and co-simulation; Partitioning of design for multiple FPGAs (Xilinx), placement of logic, clock gating and synthesis; Develop the host interface logic and optimize interface design for co-emulation at various transaction levels; Simulation of design to verify the partitioning and all emulation related design changes

Skills/Requirements

RTL designing in both VHDL and Verilog, synthesis and partitioning tools.Designing for Xilinx FPGA (Virtex5 and Virtex6), clock generation and clock handling in FPGAs, high speed IO signaling standards and layout for FPGAs. Debugging of design in the lab and using all kinds of lab tools, e.g. Oscilloscope, Logic Analyzers and power supplies etc. Interface standards and protocols e.g. PCIx, PCI, USB and high speed Serdeses. etc...Programming and scripting languages e.g. C,C++, Perl, Python etc... Working and developing scripts under linux/unix and windows platforms; Mixed language simulation with DPI,PLI under cadence IUS tools. Reasonable understanding of the following list of skills: Application software development (typically to use the ported logic to the FPGA platforms); Co-simulation and co-emulation approaches; Understanding of System Verilog / OVM design and verification approach; Solid-state hard drives and current NAND MLC FLASH technology

Actions